Integrated circuit shapes can be patterned on a wafer entirely by means of direct writing electron beam (e-beam) lithography. Using e-beam to write microcircuit patterns in integrated circuit fabrication is well known in the art.
The intended pattern can be directly written onto a semiconductor wafer by exposing a thin layer of radiation sensitive material on the wafer with a beam of electrons or, alternatively, by using a mask made with an e-beam tool to optically expose a thin layer of photoresist on the semiconductor wafer. Whether the pattern is directly written or indirectly written with a mask, the e-beam tool control remains the same. See generally, U.S. Pat. No. 4,259,724 for an example of an e-beam lithography system for direct writing to expose an entire wafer. The use of a computer to generate control data and to control the e-beam is also well known. See U.S. Pat. No. 4,820,928 for an example of a computer controlled microcircuit fabrication system.
While e-beam lithography provides the advantage of very sharply defined patterns for very small geometric shapes, transferring those shapes from a computer designed shape to a physical image on a photoresistive, or radiation sensitive layer (resist), can be both expensive and time consuming. Most of the cost associated with transforming the shape is computer operating cost, which is also generally time dependent. Therefore, reducing computer operating time will reduce both the time and the expense associated with e-beam lithography. Several approaches have been used to reduce the time required to expose a wafer with an e-beam tool. See U.S. Pat. No. 4,147,937 for an example of a method and an apparatus for exposing a wafer by raster scan writing, i.e., a single line at a time. See also, U.S. Pat. No. 4,914,304 for an example of an e-beam exposure system that uses a shaped beam to improve exposure of different shapes. Although these prior art approaches reduce the exposure time, they do not appreciably reduce the computer time required to prepare a design shape for use on the e-beam tool. Using the prior art method of preparing or processing design shapes, it sometimes takes several hundreds of Central Processing Unit (CPU) minutes to convert an entire design into a format which may be used to control an e-beam tool. So, converting the graphics representation of a shape to control parameters for controlling the e-beam tool requires significant computer resources.
The flow diagram of FIG. 1 shows the steps typically taken in the prior art to convert design data into e-beam tool control data and expose a semiconductor wafer. Each design shape is represented (30) in a graphics language by lines, rectangles, circles, and polygons Such a representation is characteristic of the particular graphics language used and the shape represented. The graphics representation of the shape must be converted to control signals for an e-beam tool. The e-beam tool uses the converted, or postprocessed, information to direct the electron beam onto the radiation sensitive layer, which writes, or exposes, the design shape onto the layer. A postprocessor is a computer program which combines the graphics data (30) and key e-beam tool processing parameters (32), also called keywords, to produce numerical control data for use by the e-beam lithographic exposure tool. Converting the design data to numerical control data is called postprocessing the design data. Numerical control data is the data used to control exposure of the radiation sensitive layer by the e-beam tool.
Before postprocessing the design data, the graphics language representation of the design data (30) and the keywords (32) are checked (34) for syntax errors. After verifying that there are no syntax errors, the postprocessor applies (40) keywords which describe shape compensation, known as etch biases, to the shapes. An etch bias is a compensation for the amount of distortion to a design shape which occurs in the process of making the final shape. Next the postprocessor transforms (42) the shapes from the graphics language grid (a unit of measure) to the e-beam tool grid.
After transforming the shapes into the tool grid, the postprocessor fills (44) the shapes. "Filling" is a term used to describe the process of reconstructing a shape out of one or more types of polygons, such as rectangles, so that the reconstructed shape is, as nearly as possible, identical to the design shape. When the E-beam tool cannot easily reproduce a portion of a shape, the fill becomes very complex. For example, an E-beam tool which was designed to expose rectangular areas might have problems exposing a shape with angled edges, edges at other than 90.degree. to adjacent edges. Typically, a staircase of small rectangles are used to approximate the angled edge. Edge smoothness would be dependent on the size of the rise and run of the staircase steps, the smaller the steps the smoother the edge. However, the smaller the step, the higher the number of steps required to fill an edge and, consequently, the larger the volume of data generated for a fill (at least one rectangle generated for each step). Once the design shape has been reconstructed, it is said to be filled with fill polygons or fill rectangles. Prior art methods required that each shape be filled twice: once to fill the shape and a second time to determine if the first fill was optimum. See U.S. Pat. No. 4,554,625 for an example of a method of producing non-overlapping rectangles to fill an area. Prior art fill methods first partitioned a design shape into quadrilaterals in the first pass. A shape with an angled edge could be partitioned into non-uniform quadrilaterals with the angled edge being segmented into unequal segments. That partitioning could lead to lost uniformity of the angled edge and degraded image quality, if the staircase generated to cover the shape along the angled edge was unique in each segment. A uniform staircase along the full length of the angled edge would provide a uniform angled edge, whereas a non-uniform staircase would not.
The fill rectangles generated during the fill (44) provide the e-beam tool with control data to direct the e-beam to expose a rectangular area. See, "Method and Apparatus for Digital Control of E-Beam Pattern Writing as Applied to Subfield and Vector Equipment," in the March, 1980 IBM Technical Disclosure Bulletin page 4583, and see, "Method and Apparatus to Provide Rapid Interpretation of Digital Source Information During Electron-Beam Pattern Writing of Rectangular Shapes," in the April, 1982 IBM Technical Disclosure Bulletin page 5681, for examples of rectangle generators. For an example of how the fill rectangles are used to control the e-beam tool, U.S. Pat. No. 3,956,634 discloses a method of exposing a fill rectangle by an inward spiral, which starts by tracing the perimeter of the rectangle and spiralling the beam inward until the center of the rectangle is reached.
After the fill (44), overlapping fill rectangles are cut and the overlaps are eliminated (46). Overlaps occurred whenever a designer used two or more overlapping simple shapes to create a more complex shape. As a result of filling the simple shapes, the more complex shape is filled. However, the fill rectangles for the simple shapes overlapped wherever the simple shapes overlapped. The overlap can be eliminated by either combining the overlapping fill rectangles into a single fill rectangle, shrinking one of the overlapping fill rectangles, removing the overlapping fill rectangles and filling along the overlap, or by any other method which would result in butting fill rectangles filling the area within the complex shape. Once the fill rectangle overlaps are eliminated (46) the fill rectangles are proximity corrected (47).
Proximity effects are created by electrons being scattered while traveling to, from and in the resist. These scattered and reflected electrons partially expose the resist up to several micrometers from their intended point of impact (scattering radius) causing over exposure of surrounding shapes. Proximity correction (47) means adding control information to the fill rectangles to adjust the length of time which the E-beam exposes the resist. For example, a fill rectangle, when exposed, may cause interference with adjacent fill rectangles known as blooming. Blooming causes "fuzzy" edges and unintentionally filled notches because rectangles become "over-exposed". Blooming can be reduced by reducing beam exposure time for adjacent rectangles.
Proximity effects may be ignored for many rectangles, especially for most internal rectangles where rectangle edge definition is not important to the final shape. Generally, however, proximity effects are considered for every rectangle on a shape's edge within the scattering radius of other rectangles. The number of rectangles within the scattering radius of a staircase rectangle may be high because the staircase is many small rectangles placed in close proximity to each other.
Exposure time may also need to be adjusted for the size of the rectangle. In particular, very small rectangles may not print without increased exposure time, resulting in degraded image quality. Increasing e-beam exposure time would assure that small rectangles would print, but it would also assure that larger rectangles would be over exposed. Reducing exposure time uniformly to print large rectangles would exacerbate the problem of printing small rectangles. However, tailoring the exposure value for every rectangle increases the data volume and CPU time used in proximity correction (47). Consequently, calculating proximity correction values may require as much or more CPU time as filling the design shapes.
After proximity correction, the fill data is encoded and passed (48) to the e-beam tool as numerical control (NC) data. Numerical control data is actually a series of commands which provide control for the e-beam tool, directing the tool to expose the radiation sensitive layer in a determined set of steps at a determined exposure level. In encoding the fill data, fill rectangles are further reduced into one or more sub-areas called spots, each of which will be written by a vertical or horizontal raster scan. When the fill data is encoded as NC data, each fill rectangle is replaced by NC data which is encoded into the pattern buffer. The pattern buffer is storage where the NC data is held for use by the e-beam tool. The exposure level is the proximity corrected value from 47 and is part of this NC data.
After the design data is converted to NC data, the e-beam tool writes (50) the design onto a wafer by exposing each fill rectangle onto a radiation sensitive layer. Once every fill rectangle has been exposed the design shape will have been written onto the layer. The exposed pattern can be developed in a manner similar to photodeveloping. The wafer, covered by the developed pattern, is then etched, implanted or otherwise similarly altered to imprint the pattern onto the wafer. So, the NC data for the e-beam tool is encoded from the data generated in the fill (44) and proximity correction (47). Since, during the fill, the computer must treat every shape as a puzzle in which the computer must both create the pieces and then fit them together, the fill (44) often accounts for the most CPU time and may produce the largest volume of data. Because the pieces created in the fill must be examined and, when necessary, corrected for proximity effects, proximity correction (47) may account for more CPU time and produce more data than the fill (44).
A semiconductor chip, typically, is comprised of several layers of shapes, commonly known as levels, and which are overlaid to form micro circuits. In the prior art, when each of these layers was created optically through a mask, these layers were known as mask levels. Although some mask levels may still be made with an optical tool, a single design may also require several levels which must be independently converted to e-beam control data and, masks for some of the remaining levels may be created using the same e-beam tool. Both filling and proximity correcting each mask level are major CPU bottlenecks which may take several CPU hours each. The CPU utilization times tend to increase as a function of N**2, where N is the number of shape edges. Since each circuit is comprised of several design shapes, and since the number of edges is directly related to the number of design shapes, CPU thruput is related to the number of circuits in the design. If a design is sufficiently complex, the time required to fill a single mask level would exceed the average time between CPU failures, known as the CPU's mean time to fail. Thus, the number of circuits allowed on an integrated circuit chip could be limited by factors such as the CPU's mean time to fail rather than the e-beam tool's other physical limitations. This problem with filling is compounded by proximity correction requirements. Reducing the time required to fill a design would provide a significant improvement over slow prior art fill methods. Additional improvement can be realized by reducing proximity correction time. Also, data volume problems are compounded for a design having a significant number of angled edges.
A prior art approach to reducing data volume has been to add a data compaction subsystem called the macro buffer to the e-beam system. The macro buffer is a portion of the e-beam tool's storage, designated for storing NC data for repetitive patterns known as "User Defined Macros" (UDMs). A macro read command replaces every occurrence of the macro in the pattern buffer. When the e-beam tool encounters the macro read command, the tool retrieves the corresponding UDM from the macro buffer and executes the NC data on the UDM. The macro buffer takes advantage of the repetitive characteristic inherent in most designs. That repetitive characteristic results from a basic precept of logic design that any logic function can be implemented in NOR gates (or NAND gates). Designers follow this basic precept by limiting the number of unique circuits they create in designing a complex integrated circuit chip. Even on a very complex chip, the number of unique circuits may be less than 100. Usually each circuit is created once ("laid out") as a cell. That cell is repeated as a UDM each time a set of shapes comprising the cell is required. By maintaining the design's nesting (reusing macros), each cell is filled once and the UDM placed in the macro buffer. Whenever the e-beam tool is to write the cell, the UDM is recalled from the Macro buffer. For a chip such as a 1 Mbit Random Access Memory (RAM), storing a command to call the UDM containing the RAM memory cell macro one million times would use much less memory than storing one million occurrences each of all rectangles used to fill the RAM cell. Thus, the macro buffer provided a significant data compaction advantage.
However, in the prior art, only UDMs were stored in the macro buffer, which still left an enormous volume of data not in the macro buffer to be filled and proximity corrected. Depending on the number of UDMs in a design and the macro buffer size, the design's UDMs might not fill the Macro Buffer, thus leaving macro buffer space unused. Also, some UDMs may be used infrequently or singly in a design. Conversely, some individual shapes may be extensively repeated even though not a UDM or part of a UDM.
Reducing the data generated during the fill and proximity correction will reduce the data volume which the computer must handle and which the computer must pass to e-beam exposure control.